SI7196DP-T1-E3【PDF 2/9 页】MOSFET N-CH D-S 30V PPAK 8SOIC

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Si7196DP

Vishay Siliconix

SPECIFICATIONS T J = 25 °C, unless otherwise noted

Parameter

Symbol

Test Conditions

Min.

Typ.

Max.

Unit

Static

Drain-Source Breakdown Voltage

V DS Temperature Coefficient

V GS(th) Temperature Coefficient

V DS

Δ V DS /T J

Δ V GS(th) /T J

V GS = 0 V, I D = 250 μA

I D = 250 μA

30

32

- 6.0

V

mV/°C

Gate-Source Threshold Voltage

V GS(th)

V DS = V GS , I D = 250 μA

1.0

3.0

V

Gate-Source Leakage

Zero Gate Voltage Drain Current

On-State Drain Current a

I GSS

I DSS

I D(on)

V DS = 0 V, V GS = ± 20 V

V DS = 30 V, V GS = 0 V

V DS = 30 V, V GS = 0 V, T J = 55 °C

V DS ≥ 5 V, V GS = 10 V

30

± 100

1

10

nA

μA

A

Drain-Source On-State Resistance a

Forward Transconductance a

R DS(on)

g fs

V GS = 10 V, I D = 12 A

V GS = 4.5 V, I D = 10 A

V DS = 15 V, I D = 12 A

0.0086

0.012

32

0.011

0.0145

Ω

S

Dynamic

b

Input Capacitance

C iss

1577

Output Capacitance

Reverse Transfer Capacitance

C oss

C rss

V DS = 15 V, V GS = 0 V, f = 1 MHz

290

138

pF

Total Gate Charge

Gate-Source Charge

Q g

Q gs

V DS = 15 V, V GS = 10 V, I D = 12 A

V DS = 15 V, V GS = 4.5 V, I D = 12 A

24.5

13.2

5.3

38

20

nC

Gate-Drain Charge

Q gd

4.3

Gate Resistance

Turn-On Delay Time

Rise Time

Turn-Off Delay Time

Fall Time

Turn-On Delay Time

Rise Time

Turn-Off Delay Time

Fall Time

R g

t d(on)

t r

t d(off)

t f

t d(on)

t r

t d(off)

t f

f = 1 MHz

V DD = 15 V, R L = 3 Ω

I D ? 5 A, V GEN = 10 V, R g = 1 Ω

V DD = 15 V, R L = 3 Ω

I D ? 5 A, V GEN = 4.5 V, R g = 1 Ω

1.8

10

8

20

8

21

12

22

12

3.0

20

16

35

16

35

24

35

24

Ω

ns

Drain-Source Body Diode Characteristics

Pulse Diode Forward Current

Continuous Source-Drain Diode Current

a

I S

I SM

T C = 25 °C

16

50

A

Body Diode Voltage

Body Diode Reverse Recovery Time

Body Diode Reverse Recovery Charge

Reverse Recovery Fall Time

Reverse Recovery Rise Time

V SD

t rr

Q rr

t a

t b

I S = 2.3 A

I F = 2.7 A, dI/dt = 100 A/μs, T J = 25 °C

0.75

25

18

13

12

1.1

40

30

V

ns

nC

ns

Notes:

a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %.

b. Guaranteed by design, not subject to production testing.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation

of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect device reliability.

www.vishay.com

2

Document Number: 70336

S09-0273-Rev. C, 16-Feb-09

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